(untitled) (Visnyk NTUU KPI Seriia - Radiotekhnika Radioaparatobuduvannia, 2019)
Introduction. Іn the classic view, program-defined radio system (Software Defined Radio, SDR) is a central processor, equipped with receiving and transmitting units. In order to speed up computational operations in SDR systems, it is proposed to use the system of residual classes as a mathematical basis. The results of research conducted by various groups of scientists in order to find ways to improve the performance of computing tools, methods of organizing an effective system for detecting and correcting errors, as well as building reliable computer systems, make it possible to assert that, within the limits of positional number systems, no fundamental changes can be expected in these areas without a significant increase in operating frequencies and hardware complications. The advantage of this method is that a software radio system can consist of several FPGAs and serve several independent radio channels, and reprogramming the properties allows you to change the number and components of message processors depending on current operating conditions. Research method. The equations in this section show the parallel nature of the RNS, free from bit transfers. These operations are called modular, because for it takes only one clock cycle to process the numerical values. To convert numbers from the binary position number system to RNS we use an algorithm based on the application of a distributed arithmetic. However, operations such as division, comparison of two numbers, and the detection of a sign are laborious and expensive in RNS Several decisions were proposed for these problem operations. They consist in the absence of the process of converting a residue into a binary system (reverse transformation) by using digital-to-analog converters in RNS. On the other hand, choosing the right set of modules is another important issue for building an effective RNS with a sufficient dynamic range. Results and analysis. Summing up some results, it can be noted that the system of residual classes allows to significantly improve the parameters of a computer in SDR especially in functional block a Direct Digital Synthesizers (DDS) in comparison with a computer built on the same physical and technological basis, but in a positional system calculation, and also to receive new more progressive constructive and structural solutions. The experimental results shows that the presented techniques offer interesting advantages for FIR filters characterized by high dynamic range and high number of taps especially when full custom multipliers are not available in the target FPGA architecture or when they must to be used for different purposes. Conclusion. Thus, the proposed system introduces clear advantages over existing systems and shows performance advantages and can be used to build modern communication systems. The proposed architecture reduces the size of the pipeline adders and multipliers which is a very important factor in the design SDR for fast work.