Frame-based synchronization adaptive method for systems based on DVB-S2 standard on FPGA
DOI:
https://doi.org/10.20535/RADAP.2015.62.77-86Keywords:
SDR, FPGA, MDP, DPDI, DVB-S2, Differential correlationAbstract
Introduction. With the development of digital technology, increasingly greater attention is paid to building radio-receiving paths based on SDR technology (Software Defined Radio). This technology involves the construction of SoC system on FPGA. Synchronization system is an important part of any radio system. This article analyzes the frame synchronization algorithms used today in terms of their efficiency and practical implementation on FPGA.Problem Statement. There are many frame synchronization algorithms for communication systems. Algorithms based on differential correlation method are extensively used these days because they are insensitive to phase and frequency distortions. The main disadvantage of the existing methods is their sensitivity to changes in the level of the input signal. Therefore, the development of the algorithm with an adaptive threshold for implementation on FPGA is an important task.
Frame synchronization algorithm for DVB-S2 standard. This section shows analysis of modern frame synchronization algorithms, which are used in DVB-S2 receivers, and shows characteristics of MDP. Frame synchronization algorithm with adaptive threshold. Algorithm with adaptive threshold [P2], which is resistant to changes in the level of the input signal, is suggested. Also a comparative analysis of this method and methods listed above is made.
Modification of the algorithm [P2] for implementation on FPGA. This section shows practical ways to implement the adaptive algorithm on FPGA hardware platform. In particular, the approximating method was used to find the location of the complex number modulus, the implementation of which is easily performed on the FPGA chip logic elements without loss of performance of the algorithm as a whole.
Conclusions. Suggested adaptive frame synchronization algorithm eliminates Automatic Gain Control (AGC) system from signal processing phase. This approach of using an adaptive threshold can be used for more sophisticated algorithms, in particular for DPDI. In future works, these tasks will be addressed.
References
Перелік посилань
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Reference
Pavlenko M. (2014) Optimization of Digital Down Converter (DDC) Parameters for implementation on FPGA. Modern problems of radio engineering, telecommunications, and computer science, Proc. of Int. Conf. TCSET’2014, Lviv – Slavske, pp. 89-91.
Marco Villanti, Paola Salmi and Giovanni Emanuele Corazza (2007) Differential Post Detection Integration Techniques for Robust Code Acquisition. IEEE transactions on communications, vol. 55, no. 11, 13p.
Dong-Uk Lee, Pansoo Kim and Wonjin Sung (2009) Robust Frame Synchronization for Low Signal-to-Noise Ratio Channels Using Energy-Corrected Differential Correlation. EURASIP Journal on Wireless Communications and Networking, 8p.
(2005) Digital Video Broadcasting (DVB) User guidelines for the second generation system for Broadcasting, Interactive Services, News Gathering and other broadband satellite applications (DVB-S2). European Telecommunications Standards Institute (ETSI), Vol. 102 376 V1.1.1, pp. 73-85.
Izvlechenie kvadratnogo kornya iz INT [Extracting square root of the INT]. Available at: http://fpgach.blogspot.com/2013/10/int.html.
Ayficher E. and Jervis B. (2006) Digital Signal Processing: Sec. Ed., Moskow, Bean-Press, 656 p.
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