The Experimental Study of the Cerium Dioxide - Silicon Interface of MIS Structures
Keywords:MIS structure, cerium dioxide, capacitance-voltage characteristic (CV characteristic), flat-band voltage, charge density at the dielectric-semiconductor interface
The article is devoted to the actual task of studying a dielectric, which is an alternative to silicon dioxide in metal-insulator-semiconductor (MIS) structures. In metal-silicon dioxide-silicon structures, upon going to nanosize, the thickness of the dielectric film decreases so much that it becomes tunnel-transparent and its breakdown voltage decreases. These phenomena can be eliminated by replacing silicon dioxide with a dielectric with a higher dielectric constant. These dielectrics primarily include oxides of transition and rare-earth metals. The parameters and characteristics of the MIS structure are determined by various factors, but the properties of the dielectric and the dielectric-semiconductor interface play a special role. In previous works of the authors, it was theoretically proved that cerium dioxide from a number of candidate dielectrics should have the best quality of the interface with silicon. This work is devoted to a study aimed at determining the flat-band voltage and capacitance of MIS structures and at assessing the quality of the cerium dioxide-silicon interface. The study is carried out by the method of capacitance-voltage characteristics. For this, the high-frequency capacitance-voltage characteristics of the aluminum – cerium dioxide – silicon structures were measured at different temperatures. The capacity of the space charge region (SCR) in the enrichment and weak inversion modes of the near-surface layer of a semiconductoris considered. It is shown that the dependence of this capacitance in the (–2) degree on the voltage at the metal electrode cs-2(VG) is linear. The intersection of this line with the abscissa axis makes it possible to determine the flat-band voltage. The slope tangent of this linear dependence makes it possible to determine the energy density of the charge at the dielectric–semiconductor interface. It is shown that the charge density at the cerium dioxide – silicon interface corresponds to the minimum values of the charge density at the silicon dioxide – silicon interface. The absence of a shift in the capacitance-voltage characteristics of the structures under study with a change in temperature indicates the stability of the charge at the cerium dioxide - silicon interface.
Hlali, S., Hizem, N. and Kalboussi, A. (2016). High-k dielectric materials for the gate oxide of a MIS capacitor: effect of interface states on the C–V characteristics. Journal of Computational Electronics, 15, pp. 1340–1350. doi: 10.1007/s10825-016-0916-0.
Korolevych, L. M. and Borisov, A. V. (2018). The Criterion for Choosing an Insulator for Silicon MOS Structures. Microsystems, Electronics and Acoustics, Vol. 23, Iss. 6, pp. 6–12. doi: 10.20535/2523-4455.2018.23.6.141435.
Kar, S. (ed.) (2013). High Permittivity Gate Dielectric Materials. 1st edn, Springer Series in Advanced Microelectronics (MICROELECTR., volume 43). Springer Berlin Heidelberg. doi: 10.1007/978-3-642-36535-5.
Zhou Y., Kojima N. and Sasaki K. (2008). Growth and dielectric properties of tetragonal ZrO2 films by limited reaction sputtering. Journal of Physics D: Applied Physics, Vol. 41, Iss. 17, p. 175414. doi: 10.1088/0022-3727/41/17/175414.
Liu, J. et al. (2019). Structure and Dielectric Property of High-k ZrO2 Films Grown by Atomic Layer Deposition Using Tetrakis (Dimethylamido) Zirconium and Ozone. Nanoscale Research Letters, Vol. 14, Iss. 1, Article number: 154. doi: 10.1186/s11671-019-2989-8.
Wang, X. et al. (2016). Electrical properties and interfacial issues of high-k/Si MIS capacitors characterized by the thickness of Al2O3 interlayer. AIP Advances, Vol. 6, Iss. 6, 065224. doi: 10.1063/1.4955001.
Hlali, S. et al. (2017). Effect of interface traps for ultra-thin high-k gate dielectric based MIS devices on the capacitance-voltage characteristics. Microelectronics Reliability, Vol. 75, pp. 154–161. doi: 10.1016/j.microrel.2017.06.056.
Rubio E. J. et al. (2014). Electronic Structure and Optical Quality of Nanocrystalline Y2O3 Film Surfaces and Interfaces on Silicon. The Journal of Physical Chemistry C, Vol. 118, Iss. 25, pp. 13644–13651. doi: 10.1021/jp502876r.
Joseph A. et al. (2020). Ion-Implanted Epitaxially Grown Gd2O3 on Silicon with Improved Electrical Properties. Journal of Electronic Materials, Vol. 49, Iss. 11, pp. 6270–6275. doi: 10.1007/s11664-020-08392-4.
Gribisch P. and Fissel A. (2020). Tuning of structural and dielectric properties of Gd2O3 grown on Si(001). Journal of Applied Physics, Vol. 128, Iss. 5, p. 055108. doi: 10.1063/5.0007793.
Tirmali P. M. et al. (2011). Structural and electrical characteristics of RF-sputtered HfO2 high-k based MOS capacitors. Solid-State Electronics, Vol. 62, Iss. 1, pp. 44–47. doi: 10.1016/j.sse.2011.04.009.
Niu G. (2010). Epitaxy of crystalline oxides for functional materials integration on silicon. École Centrale de Lyon, HAL Id: tel-00601689.
Engström O. et al. (2007). Navigation aids in the search for future high-k dielectrics: Physical and electrical trends. Solid-State Electronics, Vol. 51, Iss. 4, pp. 622–626. doi: 10.1016/j.sse.2007.02.021.
Kar S. and Singh R. (2002). Correlation between the material constants of and a figure of meritfor the high-k gate dielectrics. In Kar S. (ed.) Physics and Technology of High-k Gate Dielectrics I: Proceedings of International Symposium on High Dielectric Constant Materials: Materials Science. Salt Lake City, USA, pp. 13–23.
Deen D. A. and Champlain J. G. (2011). High frequency capacitance-voltage technique for the extraction of interface trap density of the heterojunction capacitor: Terman’s method revised. Applied Physics Letters, Vol. 99, Iss. 5, p. 053501. doi: 10.1063/1.3615279.
Kar S. (2003). Extraction of the capacitance of ultrathin high-K gate dielectrics. IEEE Transactions on Electron Devices, Vol. 50, Iss. 10, pp. 2112–2119. doi: 10.1109/TED.2003.817271.
Irvin J. C. (1962). Resistivity of Bulk Silicon and of Diffused Layers in Silicon. Bell System Technical Journal, Vol. 41, Iss. 2, pp. 387–410. doi: 10.1002/j.1538-7305.1962.tb02415.x.
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