Analysis of a Two-Stage Thyristor Rectifer Topology with Parallel Bridges for Reactive Power Reduction
DOI:
https://doi.org/10.64915/RADAP.2026.103.%25pKeywords:
phase-controlled rectifier, two-stage converter, parallel-bridge rectifier, reactive power, power factor correction, high-power DC drivesAbstract
High-power phase-controlled thyristor DC drives, despite their reliability, have a fundamental drawback: significant reactive power consumption from the supply network, especially in dynamic operating modes with large firing angles (α). This leads to a low Displacement Power Factor (DPF) and additional losses. This study analyzes a cost-effective novel two-stage thyristor rectifier topology proposed to mitigate this problem. The topology utilizes a special transformer with secondary winding taps (e.g., at 50% and 100% voltage) that feed two 6-pulse bridges (R1 and R2), connected in parallel to a common DC load. The system functions as a high-speed solid-state equivalent of an On-Load Tap Changer (OLTC). By sequentially engaging the bridges, the converter maintains small firing angles (α) over a wide output voltage range. A detailed analysis of the energy characteristics, based on a case study of a typical acceleration cycle for a high-inertia drive (hoisting machine), demonstrates the topology's energy efficiency. Compared to a conventional single-bridge thyristor rectifier, the two-stage scheme reduces the total reactive energy consumed per acceleration cycle by 51% (from 54.4 kVAr · h to 26.8 kVAr · h in the example). An additional advantage of the solution is the reduction of the Root-Mean-Square (RMS) primary winding current during the initial acceleration stage, which leads to lower active power (I2R) losses in the transformer and supply lines. A drawback of the considered commutation algorithm is the presence of a 'discontinuous current mode' in the transformer primary winding during the mixed-mode (simultaneous operation of R1 and R2), which significantly degrades the harmonic spectrum (THD) of the input current, making the converter non-compliant with power quality standards (e.g., IEEE 519). The study concludes that practically implementing this energy-efficient topology requires hardware adaptation, specifically through the design of a custom Inter-Phase Reactor (IPR) or integration into multi-pulse configurations, to mitigate harmonic distortion while preserving the reactive power benefits.
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