Modeliuvannia elektronnykh skhem metodom formuvannia kompaktnoi matrytsi providnostei [Simulation of electronic circuits by forming a compact admittance matrix]

Authors

  • S. B. Tarabarov Kiev Politechnic Institute, Kiev

Keywords:

admittance matrix, modeling of electronic circuits, algorithm, system of equations

Abstract

The algorithm gradual formation of the admittance matrix circuit in accordance with the "growing" scheme of the circuit which is modeled with oblyamlennyam previous system of equations, and removing it from the equations that are not required for its further formation. It is shown that the algorithm provides significant savings of memory and almost linear dependence of time spent on the size of the circuit simulation.

Author Biography

S. B. Tarabarov, Kiev Politechnic Institute, Kiev

Tarabarov S. B.

References

Сигорский В. П., Петренко А. И. Алгоритмы анализа электронных схем. – Киев : Техніка, 1970. - 396 с.

Глориозое Е. Л., Ссорин В. Г., Сыпчук П. П. Введение в автоматизацию схемотехнического проектирования. – М. : Сов. радио, 1976. - 224 с.

Сигорский В. П. Математический аппарат инженера. – Киев : Техніка, 1975. – 768 с.

Issue

Section

Scientific - Technical section