Application of the microprocessor in the unit grading capacitors

Authors

  • S. A. Sedov Kiev Politechnic Institute, Kiev
  • A. D. Sheremetkin Kiev Politechnic Institute, Kiev

Abstract

A simplified functional diagram of a device containing a central processing unit, multi-mode buffer registers, memories, encoder, and other decoders. The results of calculations of reliability and technical and economic indicators. Device performance compared with the prior art is increased by 15 times, saving operator employment 3 times.

Author Biographies

S. A. Sedov, Kiev Politechnic Institute, Kiev

Sedov S. A.

A. D. Sheremetkin, Kiev Politechnic Institute, Kiev

Sheremetkin A. D.

References

Алексенко А. Г. Проектирование радиоэлектронной аппаратуры на микропроцессорах М.: Радио и связь, 1984. 272 с.

Issue

Section

Articles