Issledovanie vliyaniya optimizatsii tekhnologicheskogo protsessa na nadezhnost' integral'nykh mikroskhem [Investigation of the effect of process optimization reliability of integrated circuits]

Authors

  • N. M. Prishchepa Kiev Politechnic Institute, Kiev
  • S. N. Demenin Kiev Politechnic Institute, Kiev

Keywords:

manufacturing process, diffusion, MOS transistor, reliability of chip

Abstract

The performed experimental studies of the effect of the optimization process of diffusion in the formation of the source and drain regions of the MOS transistor in the main electrical parameters and reliability of the chip.

Author Biographies

N. M. Prishchepa, Kiev Politechnic Institute, Kiev

Prishchepa N.M.

S. N. Demenin, Kiev Politechnic Institute, Kiev

Demenin S.N.

Issue

Section

Articles