IC Discrete-Analog Correlators Accuraccy Improvements
DOI:
https://doi.org/10.20535/RADAP.2017.70.37-42Keywords:
IC discrete-analog correlators, vector signal multipliers, signal samplesAbstract
Some variants to improve accuracy of the integrated circuits of asynchronous digital-analog correlators with a binary impulse response are discussed. Possibility of signal processing with an arbitrary impulse response in binary form is presented. Each variant of the asynchronous programmable correlators structure have been constructed upon parallell channels. Each channel consists of two quadrature parts. It has SIN-code register, COS-code register and selector register for sample-hold input signal operations to load signal samples into static parallel analog cells. Each correlator channel has weight. Master channel has weight 1. Next has weight ½ etc. according to pulse function binary code.. In the first correlator case the input voltage was been scaled from channel to channel, in the second – output signals has been divided according to bit pulse function. The third case have been realized when each channel scaled supply parallel analog memory current. It have supplied maximum signal/noise ratio in signal processing. The main meaning is the output resistance analog parallel memory is low. All three variants of realization have tested. The best result was obtained in case when current of the parallel analog memory have been scaled. The output response have been discovered when input signal was equal 20 mV with input noise 1 V. The master clock was equal 80 MHz. The reference code had long of 1024 points for four parallel channels analog memory. It is noted the modern design must be done to increase the master clock up to 800 MHz. It is noted as well the new correlator can be build with scaled IC topological components for currents weighting. This way the MOS-transistor is in a steep area of CVC.References
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